Seamless Atomic Interfaces Cut Contact Resistance in 2D Chips

Imagine squeezing a highway into a single lane and still watching traffic glide without a hitch. That metaphor helps explain what researchers in South Korea have just managed to do for electricity at the atomic scale: eliminate a choke point that has long throttled next‑generation chips.

When engineers shrink transistors, one stubborn bottleneck keeps reappearing. It's not the channel that carries current; often that conducts perfectly well. The trouble is the contact where metal electrodes feed charge into the semiconductor. That tiny boundary wastes energy, heats up devices and erodes most of the performance gains you expect from smaller geometries.

Infographic about the study. 

A team led by Professor Seungbum Hong at KAIST, working with Professors Kibum Kang and Sung Beom Cho, has sidestepped this problem by doing something simple and elegant: they stopped joining two different materials together. Instead, they patterned a single sheet of platinum diselenide — PtSe2 — so that thicker regions behave like a semimetal and thinner regions act as a semiconductor. The result is a monolithic device where the conductive and semiconducting zones flow into each other without a physical seam.

Proving electricity really flows — at the nanometer scale

Promises are cheap. Proof, however, requires peering at charges as they travel. The researchers turned to atomic force microscopy combined with in‑plane current detection to map how electrons move across the thickness‑tuned boundary. A fine probe scanned the surface while electrical signals were recorded, producing nanometer‑scale images of current flow. Published in the journal Matter, those maps showed something crucial: the current didn’t detour or pile up at the interface. It simply kept going.

Conceptual diagram of the research explained by KAIST’s mascot character (Nubzuki). 

That observation matters because it’s the first direct experimental evidence that a semimetal‑to‑semiconductor transition inside one continuous 2D film can preserve unhindered charge transport. In other words, you don't always need a separate metal contact to feed carriers into an ultrathin semiconductor; you can make the contact out of the same material by controlling thickness.

They didn’t stop at showing conduction. The team applied an electric field to the thinner, semiconducting region and demonstrated gate control — the switching behavior transistors rely on. So the same atomically seamless structure can both feed current and act as an active device element. Compactness and efficiency, in a single sheet.

Why PtSe2? The material’s electronic character is unusually sensitive to thickness. A few extra layers nudge it from semiconducting to semimetallic, giving researchers a built‑in toolkit for making distinct electronic regions without chemical processing or stacking different crystals. It’s a clever use of physics: thickness becomes the switch.

There are caveats. Moving from lab demonstrations to real chips will require work on durability, reproducibility and methods for integrating these films into complex circuits at wafer scale. Fabrication tolerances, thermal stability and compatibility with existing semiconductor processes all need careful engineering. But the path is different from the usual materials marriage; it’s about sculpting a single material to perform multiple roles.

(From left to right) KAIST Professor Kibum Kang, Dr. Minseung Gyeon, Ph.D. candidate Yeongyu Kim, and Professor Seungbum Hong; and, in the circles from left, Sungkyunkwan University Ph.D. candidate Ji Hoon Hong and Professor Sung Beom Cho.

The implications extend beyond one device. As AI accelerators, low‑power sensors and future logic circuits push for denser, faster, cooler electronics, contact resistance becomes a defining constraint. Lowering that resistance without introducing new interfaces could reduce energy waste and let engineers push transistor scaling further. It’s a design philosophy: exploit the intrinsic versatility of 2D crystals rather than force-fit bulk solutions onto them.

This work is part of a growing trend to build electronics by engineering atomic landscapes instead of assembling disparate parts. Think of it as carving a racetrack into a single sheet rather than connecting separate tracks with clumsy junctions. The experiment from KAIST is a practical step toward that vision, showing both the physics and the functionality needed to keep charges moving smoothly.

If engineers can translate these demonstrations into reliable manufacturing techniques, the next wave of chips might not just be more compact — they could be smarter about how they move electricity, too. That would matter for every device that values speed and battery life, from edge sensors to giant data‑center accelerators. Who knew trimming a few atomic layers could look so much like progress?